The fabrication of semiconductor devices involves forming electronic components in and on semiconductor substrates, such as silicon wafers. These electronic components may include one or more conductive layers, one or more insulation layers, and doped regions formed by implanting various dopants into portions of a semiconductor substrate to achieve specific electrical properties. Semiconductor devices include transistors, resistors, capacitors, and the like, with intermediate and overlying metallization patterns at varying levels, separated by dielectric materials, which interconnect the semiconductor devices to form integrated circuits.
Field-effect transistors (FETs), such as metal-oxide-semiconductor FETs (MOSFETs), are a commonly used semiconductor device. Generally, a FET has three terminals, i.e., a gate structure (or gate stack), a source region, and a drain region. In some instances, the body of the semiconductor may be considered a fourth terminal. The gate stack is a structure used to control output current, i.e., flow of carriers in the channel portion of a FET, through electrical or magnetic fields. The channel portion of the substrate is the region between the source region and the drain region of a semiconductor device that becomes conductive when the semiconductor device is turned on. The source region is a doped region in the semiconductor device from which majority carriers are flowing into the channel portion. The drain region is a doped region in the semiconductor device located at the end of the channel portion, in which carriers are flowing into from the source region via the channel portion and out of the semiconductor device through the drain region. A conductive plug, or contact, is electrically coupled to each terminal. One contact is made to the source region, one contact is made to the drain region, and one contact is made to the gate stack.
Metallic tungsten (W) is the primary conductor for contacts. As semiconductor nodes are scaled down, the transistors and contacts become increasingly smaller and the electrical resistance may increase to unacceptable levels. To reduce contact resistance, silicides (silicon metal alloys) are often formed on the semiconductor substrate between a doped region, such as the source or drain, and the contact.
A typical contact is comprised of the liner layer (Ti/TiN) and the W metal. The Ti film is deposited by physical vapor deposition (PVD) and the thin TiN by atomic layer deposition (ALD). The W layer is formed in two steps. In the first step, a thin nucleation layer is formed with the reduction of tungsten hexafluoride (WF6) by either silane (SiH4) or diborine (B2H6). In the second step the bulk of W is deposited with the reduction of WF6 by hydrogen in a chemical vapor deposition (CVD) environment. Fluorine (F), which is formed as a byproduct during the W deposition, can violently react with the Ti and Si underneath and form defects known as “volcanoes”. These defects when created will prohibit the flow of current and irreversibly damage the contact. The TiN layer prevents F from reaching and reacting with the underlying layers.
Various issues arise with depositing and using Ti/TiN films. These films, especially as semiconductor devices are scaled down, can significantly contribute to contact resistance. In addition, as the TiN barrier is thinned to meet the scalability requirements, its barrier properties are degraded and the underlying Ti and/or the silicide/doped region may be exposed to fluorine.